As switching elements which control electric power supply to loads such as motors, insulating-gate-type semiconductor devices such as Insulated Gate Bipolar Transistors (IGBTs) and Metal Oxide Semiconductor Field Effect Transistors (MOSFETs) are widely used in power electronics devices. One of vertical MOSFETs for electric power control is a trench-gate-type MOSFET in which a gate electrode is formed to be buried in a semiconductor layer (for example, Patent Documents 1, 2 described below). The MOSFET for electric power control requires a low resistance in an on-operation and a high withstand voltage in an off-operation. However, generally, in a trench-gate-type MOSFET, withstand-voltage increase and on-resistance reduction are in a trade-off relation.
On the other hand, as next-generation switching elements capable of realizing a high withstand voltage and a low loss, MOSFETs, IGBTs, etc. using a wide-band-gap semiconductor such as silicon carbide (SiC) are attracting attention and are highly expected to be applied to the technical field in which high voltages of about 1 kV or more are used. Examples of the wide-band-gap semiconductor include gallium-nitride (GaN)-based materials, diamonds, etc. other than SiC.
In some of the vertical MOSFETs for electric power control, a plurality of unit MOSFETs are connected in parallel and used as one MOSFET. MOSFETs can be sorted by the disposition patterns of the individual unit MOSFETs constituting them. Examples of typical ones include a cell type which include one unit MOSFET (cell) having a source region formed in a square-shaped pattern and having a gate trench surrounding therearound, and the examples of the typical ones include a stripe type which has source regions formed in long-and-narrow stripe-shaped patterns and has a gate trench disposed between the two patterns.
In a MOSFET region including a plurality of unit MOSFETs (cells), in an outer peripheral portion of the MOSFET region, the state of electric fields is different from that in the interior of the MOSFET region. Therefore, in a configuration in which the cells having the same structures as those in the interior of the MOSFET region are disposed in the outer peripheral portion of the MOSFET, avalanche breakdown sometimes occurs in the outer peripheral portion. Since the withstand voltage as the whole MOSFET is determined by the lowest withstand voltage among the withstand voltages of the individual cells, the cells disposed in the outer peripheral portion in which the state of electric fields is different are also required to have the withstand voltages equivalent to those of the cells in the interior. Therefore, in order to increase the withstand voltage, it has been proposed to cause the cells disposed in the outer peripheral portion to have the structures or dimensions different from those of the cells disposed in the interior.
For example, Patent Document 1 discloses a technique of restraining generation of high electric fields in the outer peripheral portion by extending the trenches of the cells disposed in the outer peripheral portion so that they reach an electric-field diminishing portion. Patent Document 2 discloses a technique of forming a structure dedicated for diminishing electric fields in the outer peripheral portion, wherein, for example, gate trenches are eliminated from all the cells disposed in the outer peripheral portion According to these techniques, the withstand voltages in the outer-peripheral-portion cells at which avalanche breakdown easily occurs can be improved, and the withstand voltage as the whole MOSFET can be improved.